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TI 公司的TMS320F28379是功能強大的32位浮點微控制器(MCU),支持新雙核C28x架構,大大提升了系統性能,每核信號處理性能200MHz,集成模擬和控制外設使高端系統的設計者合并控制體系結構,不需要多個處理器;器件還集成了512KB (256KW)或1MB (512KW)閃存(ECC保護),172KB (86KW)或204KB (102KW)RAM(ECC保護或奇偶校驗位保護),支持第三方開發的雙區安全以及唯一識別號碼.滿足汽車應用的AEC Q100規范,主要用在先進駕駛輔助系統(ADAS),建筑物自動化,POS終端,EV/HEV動力傳動,工廠自動化,電網架構,工業傳輸,醫療,健康和健美設備,馬達驅動,供電,通信設備,測試和測量.本文介紹了TMS320F28379主要特性,框圖,以及采用C2000?微控制器的數控500W兩相交叉LLC諧振轉換器參考設計TIDM-1001主要特性和指標,電路圖和材料清單.

The Delfino? TMS320F2837xD is a powerful 32-bit floating-point microcontroller unit (MCU) designed foradvanced closed-loop control applications such as industrial drives and servo motor control; solarinverte rs and converters; digital power; transportation; and power line communications. Completedevelopment packages for digital power and industrial drives are available as part of the powerSUITE andDesignDRIVE initiatives. While the Delfino product line is not new to the TMS320C2000? portfolio, theF2837xD supports a new dual-core C28x architecture that significantly boosts system performance. Theintegrated analog and control peripherals also let designers consolidate control architectures and eliminatemultiprocessor use in high-end systems.

The dual real-time control subsystems are based on TI’s 32-bit C28x floating-point CPUs, which provide200 MHz of signal processing performance in each core. The C28x CPUs are further boosted by the newTMU accelerator, which enables fast execution of algorithms with trigonometric operations common intransforms and torque loop calculations; and the VCU accelerator, which reduces the time for complexmath operations common in encoded applications.

The F2837xD microcontroller family features two CLA real-time control coprocessors. The CLA is anindependent 32-bit floating-point processor that runs at the same speed as the main CPU. The CLAresponds to peripheral triggers and executes code concurrently with the main C28x CPU. This parallelprocessing capability can effectively double the computational performance of a real-time control system.

By using the CLA to service time-critical functions, the main C28x CPU is free to perform other tasks, suchas communications and diagnostics. The dual C28x+CLA architecture enables intelligent partitioningbetween various system tasks. For example, one C28x+CLA core can be used to track speed andposition, while the other C28x+CLA core can be used to control torque and current loops.

The TMS320F2837xD supports up to 1MB (512KW) of onboard flash memory with error correction code(ECC) and up to 204KB (102KW) of SRAM. Two 128-bit secure zones are also available on each CPU forcode protection.

Performance analog and control peripherals are also integrated on the F2837xD MCU to further enablesystem consolidation. Four independent 16-bit ADCs provide precise and efficient management of multipleanalog signals, which ultimately boosts system throughput. The new sigma-delta filter module (SDFM)works in conjunction with the sigma-delta modulator to enable isolated current shunt measurements. TheComparator Subsystem (CMPSS) with windowed comparators allows for protection of power stages whencurrent limit conditions are exceeded or not met. Other analog and control peripherals include DACs,PWMs, eCAPs, eQEPs, and other peripherals.

Peripherals such as EMIFs, CAN modules (ISO 11898-1/CAN 2.0B-compliant), and a new uPP interfaceextend the connectivity of the F2837xD. The uPP interface is a new feature of the C2000? MCUs andsupports high-speed parallel connection to FPGAs or otherprocessors with similar uPP interfaces. Lastly,a USB 2.0 port with MAC and PHY lets users easily add universal serial bus (USB) connectivity to theirapplication.

TMS320F28379主要特性:

? Dual-Core Architecture

Two TMS320C28x 32-Bit CPUs

200 MHz

IEEE 754 Single-Precision Floating-Point Unit(FPU)

Trigonometric Math Unit (TMU)

Viterbi/Complex Math Unit (VCU-II)

? Two Programmable Control Law Accelerators(CLAs)

200 MHz

IEEE 754 Single-Precision Floating-PointInstructions

Executes Code Independently of Main CPU

? On-Chip Memory

512KB (256KW) or 1MB (512KW) of Flash(ECC-Protected)

172KB (86KW) or 204KB (102KW) of RAM(ECC-Protected or Parity-Protected)

Dual-Zone Security Supporting Third-PartyDevelopment

Unique Identification Number

? Clock and System Control

Two Internal Zero-Pin 10-MHz Oscillators

On-Chip Crystal Oscillator

Windowed Watchdog Timer Module

Missing Clock Detection Circuitry

? 1.2-V Core, 3.3-V I/O Design

? System Peripherals

Two External Memory Interfaces (EMIFs) WithASRAM and SDRAM Support

Dual 6-Channel Direct Memory Access (DMA)Controllers

Up to 169 Individually Programmable,Multiplexed General-Purpose Input/Output(GPIO) Pins With Input Filtering

Expanded Peripheral Interrupt Controller (ePIE)

Multiple Low-Power Mode (LPM) Support WithExternal Wakeup

? Communications Peripherals

USB 2.0 (MAC + PHY)

Support for 12-Pin 3.3 V-Compatible UniversalParallel Port (uPP) Interface

Two Controller Area Network (CAN) Modules(Pin-Bootable)

Three High-Speed (up to 50-MHz) SPI Ports(Pin-Bootable)

Two Multichannel Buffered Serial Ports(McBSPs)

Four Serial Communications Interfaces(SCI/UART) (Pin-Bootable)

Two I2C Interfaces (Pin-Bootable)

? Analog Subsystem

Up to Four Analog-to-Digital Converters (ADCs)

16-Bit Mode

1.1 MSPS Each (up to 4.4-MSPS SystemThroughput)

Differential Inputs

Up to 12 External Channels

12-Bit Mode

3.5 MSPS Each (up to 14-MSPS SystemThroughput)

Single-Ended Inputs

Up to 24 External Channels

Single Sample-and-Hold (S/H) on Each ADC

Hardware-Integrated Post-Processing of ADCConversions

Saturating Offset Calibration

Error From Setpoint Calculation

High, Low, and Zero-Crossing Compare,With Interrupt Capability

Trigger-to-Sample Delay Capture

Eight Windowed Comparators With 12-BitDigital-to-Analog Converter (DAC) References

Three 12-Bit Buffered DAC Outputs

? Enhanced Control Peripherals

24 Pulse Width Modulator (PWM) ChannelsWith Enhanced Features

16 High-Resolution Pulse Width Modulator(HRPWM) Channels

High Resolution on Both A and B Channels of8 PWM Modules

Dead-Band Support (on Both Standard andHigh Resolution)

Six Enhanced Capture (eCAP) Modules

Three Enhanced Quadrature Encoder Pulse(eQEP) Modules

Eight Sigma-Delta Filter Module (SDFM) InputChannels, 2 Parallel Filters per Channel

Standard SDFM Data Filtering

Comparator Filter for Fast Action for Out ofRange

? Configurable Logic Block (CLB)

Augments Existing Peripheral Capability

Supports Position Manager Solutions

? Package Options:

Lead-Free, Green Packaging

337-Ball New Fine Pitch Ball Grid Array(nFBGA) [ZWT Suffix]

176-Pin PowerPAD? Thermally Enhanced Low-Profile Quad Flatpack (HLQFP) [PTP Suffix]

100-Pin PowerPAD Thermally Enhanced ThinQuad Flatpack (HTQFP) [PZP Suffix]

? Temperature Options:

T: –40oC to 105oC Junction

S: –40oC to 125oC Junction

Q: –40oC to 125oC Free-Air

(AEC Q100 Qualification for AutomotiveApplications)

TMS320F28379應用:

? Advanced Driver Assistance Systems (ADAS)

? Building Automation

? Electronic Point of Sale

? Electric Vehicle/Hybrid Electric Vehicle (EV/HEV)Powertrain

? Factory Automation

? Grid Infrastructure

? Industrial Transport

? Medical, Healthcare, and Fitness

? Motor Drives

? Power Delivery

? Telecom Infrastructure

? Test and Measurement

基于TMS320F28379數控500W轉換器參考設計TIDM－1001電路圖

圖1.TMS320F28379功能框圖

采用C2000?微控制器的數控500W兩相交叉LLC諧振轉換器參考設計TIDM-1001

This TI Design implements a digitally-controlled, 500-W, two-phase interleaved LLC resonant converter. Thesystem is controlled by a single, C2000 microcontroller(MCU), MS320F28379, which also generates pulsewidth modulation (PWM) waveforms for all powerelectronic switching devices under all operatingmodes. This design implements an innovative current

sharing technique to accurately achieve currentbalancing between phases.

Resonant converters are popular DC-DC converters frequently used in server, telecom, automotive,industrial, and other power supply applications. The converters are a good choice for medium- to highpowerapplications because of their adherence to improving industry standards, ever-increasing powerdensitygoals, and high-performance (efficiency, power density, and so forth) standards,These are variable-frequency converters where the PWM-switching frequency of operation frequentlychanges during runtime. For reliable operation the changing frequencies must not produce any glitches orirregular PWM behavior. For applications with high-output currents that require input-output isolation, it is acommon practice to use synchronous rectification (SR) on the secondary of the isolation transformer. SRuses additional power electronic devices switching with changing frequencies. High-power applicationsmay require use of multiphase interleaved converters. These interleaved converters have even moredevices switching with variable frequencies and additionally require fixed-phase relationships betweenvarious phases under all operating frequencies. Guaranteeing correct PWM waveform generation withchanging frequencies under all operating conditions is a big challenge for the controller. Furthermore,interleaving multiple phases of resonant converters presents current sharing challenges between phases.

Inadequate or improperly implemented current sharing or incorrect PWM waveform generation can lead toconverter failure, significant system or component damage, and, in the worst case, significant propertydamage or resultant bodily injury or loss of life.

In server and telecom power supply applications, these converters are used to work as the isolated DCDCconverter stage in the rectifier system. These converters provide high fficiency and power densitythrough soft-switching, SR, and other techniques.

These converters are gaining popularity in automotive on-board charging applications. Additionally, thesedevices may be used as isolated, bi-directional converters in electric vehicles (EVs) and hybrid electricvehicle (HEVs).

This design implements a 500-W, two-phase, interleaved half-bridge (HB) LLC resonant converter with SRon the secondary. The system is controlled by a single C2000 MCU, TMS320F28379, which alsogenerates correct PWM waveforms for all power electronic switching devices (MOSFETs) using the latestfeatures on C2000 MCUs. An innovative current sharing technique is implemented by the C2000 MCU toaccurately achieve current and phase balancing for multiphase interleaved converters.

The accompanying software allows programming the controller and experimenting with different controlparameters to tune the control loop for good system performance. This design supports the use of C2000powerSUITE tools like the compensation designer, the software frequency response analyzer, and thesolution adapter. The software project allows users to evaluate the complete system with the help of thesesupported tools. This document provides the hardware and software design details along with the testresults. This document also describes a structured step-by-step method to evaluate this solution bystarting with a simple open-loop excitation and then working towards a complete well-tuned closed-loopsystem.