ADI公司的ADRF5020是30GHz RF通用單刀雙擲（SPDT）和單刀四擲（SP4T）開(kāi)關(guān)，采用 20 引腳和 24 引腳基板柵格陣列（LGA）封裝，提供高隔離度和高達(dá)30GHz的低插入損耗，超寬帶頻率范圍為100 MHz至30 GHz，非反射式50 Ω設(shè)計(jì)，低插入損耗2.0 dB（30 GHz時(shí)），高隔離度60 dB（30 GHz時(shí)），高輸入線性度，1 dB壓縮（P1dB）28 dBm，三階交調(diào)截點(diǎn)（IP3）52 dBm（典型值），主要用在測(cè)試測(cè)量，微波無(wú)線電和甚小孔徑終端（VSAT）以及軍用無(wú)線電，雷達(dá)，電子計(jì)數(shù)測(cè)量（ECM）和寬帶通信系統(tǒng)。本文介紹了ADRF5020主要特性和功能框圖，以及評(píng)估板ADRF5020-EVALZ主要特性，電路圖，材料清單和PCB設(shè)計(jì)圖。

The ADRF5020 is a general-purpose， single-pole， double-throw （SPDT） switch manufactured using a silicon process. It comes in a 3 mm × 3 mm， 20-terminal land grid array （LGA） package and provides high isolation and low insertion loss from 100 MHz to 30 GHz.

This broadband switch requires dual supply voltages， +3.3 V and ?2.5 V， and provides CMOS/LVTTL logic-compatible control.

The ADRF5020 requires a positive supply voltage applied to the VDD pin and a negative supply voltage applied to the VSS pin. Bypassing capacitors are recommended on the supply lines to minimize RF coupling.

The ADRF5020 is internally matched to 50 Ω at the RF common port （RFC） and the RF throw ports （RF1 and RF2）; therefore， no external matching components are required. All of the RF ports are dc-coupled to 0 V， and no dc blocking is required at the RF ports when the RF line potential is equal to 0 V. The design is bidirectional; the RF input signal can be applied to the RFC port while the RF throw port （RF1 or RF2） is output or vice versa.

The ADRF5020 incorporates a driver to perform logic functions internally and to provide the user with the advantage of a simplified control interface. The driver features two digital control input pins， CTRL and EN.

ADRF5020主要特性：

Ultrawideband frequency range： 100 MHz to 30 GHz

Nonreflective 50 Ω design

Low insertion loss： 2.0 dB to 30 GHz

High isolation： 60 dB to 30 GHz

High input linearity

1 dB power compression （P1dB）： 28 dBm typical

Third-order intercept （IP3）： 52 dBm typical

High power handling

24 dBm through path

24 dBm terminated path

ESD sensitivity： Class 1， 1 kV human body model （HBM）

20-terminal， 3 mm × 3 mm， land grid array package

No low frequency spurious

Radio frequency （RF） settling time （to 0.1 dB of final RF output）： 15 ns

ADRF5020應(yīng)用：

Test instrumentation

Microwave radios and very small aperture terminals （VSATs）

Military radios， radars， electronic counter measures （ECMs）

Broadband telecommunications systems

圖1.ADRF5020功能框圖

評(píng)估板ADRF5020-EVALZ

ADRF5020-EVALZ是一款配置齊全的4層RO4003評(píng)估板。正常工作時(shí)，需將兩個(gè)電源電壓+3.3 V和-2.5 V分別連接至DC測(cè)試點(diǎn)的VDD和VSS引腳，同時(shí)接地電壓施加于DC測(cè)試點(diǎn)的GND引腳。

用于選擇開(kāi)關(guān)狀態(tài)的兩個(gè)0/+3.3 V控制電壓施加于直流測(cè)試點(diǎn)的EN和CTRL。RF輸入信號(hào)可施加于邊緣安裝型2.4mm RF連接器RFC，并在邊緣安裝型2.4mm RF連接器的RF1和RF2上測(cè)量RF輸出信號(hào)。

All RF and dc traces are routed on the top copper layer whereas the inner and bottom layers are grounded planes that provide a solid ground for the RF transmission lines. Top dielectric material is 8 mil Rogers RO4003， offering good high frequency performance. The middle and bottom dielectric materials are FR-4 type materials to achieve an overall board thickness of 62 mil.

The RF transmission lines were designed using a coplanar waveguide （CPWG） model with a width of 14 mil and ground spacing of 5 mil to have a characteristic impedance of 50 Ω。 For good RF and thermal grounding， as many plated through vias as possible are arranged around transmission lines and under the exposed pad of the package.

Two control ports are connected to the EN and CTRL test points， TP3 and TP4. On each control trace， a resistor position is available to improve the isolation between the RF and control signals. The RF ports are connected to the RFC， RF1， and RF2 connectors （J1， J2， and J3） that are end launch 2.4 mm RF connectors. A through transmission line that connects unpopulated RF connectors （J7 and J8） is also available to measure the loss of the PCB. Figure 21 and Table 5 are the evaluation board schematic and bill of materials， respectively.

圖2.評(píng)估板ADRF5020-EVALZ外形圖

圖3.評(píng)估板ADRF5020-EVALZ電路圖

評(píng)估板ADRF5020-EVALZ材料清單：

圖4.評(píng)估板ADRF5020-EVALZ PCB布局圖（頂視圖）

圖5.評(píng)估板ADRF5020-EVALZ PCB元件分布圖