Interface Data Sheet的引腳圖、接線圖、封裝手冊、中文資料、英文資料,MAX16550A-MAX16550B: Integrated Protection IC on 12V Bus
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電子發燒友網為你提供ADI(ADI)AD2430/AD2438: Automotive Audio Bus (A<sup>2</sup>B) Transceiver Data
2023-10-12 18:53:45
AD7380/AD7381: What are the pros and cons of a Serial 2 wire mode and serial 1 wire mode?
2021-02-02 09:24:0913 What Is XML?XML stands for Extensible Markup Language (often written aseXtensibleMarkup Language
2008-10-07 14:21:05
This data is presented for the purpose of quick selection. It lists what is considered
2016-09-12 15:57:202 What the Internet of Things (IoT) Needs to Become a Reality,Freescale發布的IOT白皮書!
2015-10-30 17:04:407 The SN65LBC176A, SN65LBC176AQ, and SN75LBC176A differential bus transceivers are monolithic
2010-09-04 21:47:0410 The TL3695 differential bus transceiver is designed for bidirectional data communication
2010-09-04 17:12:0212 The SN75176A differential bus transceiver is a monolithic integrated circuit designed
2010-09-03 03:56:1429 registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT823T is a 9-bit-wide buffered r
2010-07-26 16:31:386 registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT823T is a 9-bit-wide buffered r
2010-07-26 16:23:496 registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT823T is a 9-bit-wide buffered r
2010-07-26 16:22:205 registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT821T is a 10-bit-wide buffered
2010-07-26 16:20:534 registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT821T is a 10-bit-wide buffered
2010-07-26 16:19:226 registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT821T is a 10-bit-wide buffered
2010-07-26 16:16:135
The SN74LVCZ32245A is designed for asynchronous communication between data buses. The control-function implementation
2010-07-25 17:35:255 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from th
2010-07-25 17:33:158
The SN74LVCZ16245A is designed for asynchronous communication between data buses. The control-function implementation
2010-07-25 17:31:328 operation.
The SN74LVC32245A is designed for asynchronous communication between data buses. The control-function implementation
2010-07-25 17:27:505 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from
2010-07-25 17:24:3420 operation.
The SN74LVCR16245A is designed for asynchronous communication between data buses. The control-function implementatio
2010-07-25 17:18:289 operation.
The SN74LVCHR32245A is designed for asynchronous communication between data buses. The control-function implementati
2010-07-25 17:10:118 operation.
The SN74LVCHR16245A is designed for asynchronous communication between data buses. The control-function implemen
2010-07-25 17:07:239 operation.
The SN74LVCH32245A is designed for asynchronous communication between data buses. The control-function implementatio
2010-07-25 17:04:396 This 9-bit bus transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC863A
2010-07-25 16:39:138 This 10-bit bus transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC861A
2010-07-24 20:09:2811 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from th
2010-07-24 19:39:3732 operation.
The SN74LVC16245A is designed for asynchronous communication between data buses. The control-function implementation
2010-07-24 17:27:3319 This octal bus transceiver is designed for asynchronous two-way communication between data buses.
2010-07-24 17:17:5816 are designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or
2010-07-24 17:09:4521 buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control
2010-07-24 16:55:0324 buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control
2010-07-24 16:49:296 buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control
2010-07-24 16:46:275 buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control
2010-07-24 16:43:0812 buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control
2010-07-24 16:38:3118 buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control
2010-07-24 16:34:578 buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-contr
2010-07-24 15:37:348 The devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the direction-control (D
2010-07-24 14:47:586 The control-function implementation allows for maximum flexibility in timing.
The device allows data transmission from the A bus to the B bus
2010-07-24 14:35:199 This 25-octal bus transceiver is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus
2010-07-24 14:24:274 The ´BCT25245 is a 25- octal bus transceiver designed for asynchronous communication between data buses. It improves both the performance an
2010-07-24 14:20:5110 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from t
2010-07-23 18:46:5212 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from th
2010-07-23 18:39:2415 buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the level at the direction-control
2010-07-23 18:37:548 buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the level at the direction-control
2010-07-23 18:36:328 buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the directi
2010-07-23 18:32:5915 buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the directi
2010-07-23 18:31:0912 buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the directi
2010-07-23 18:22:437 buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-contr
2010-07-23 18:21:234 buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-contr
2010-07-23 18:18:587 open-collector and 3-state buses. The devices transmit data from the A bus (open-collector) to the B bus (3 state) or from the B bus to the A bus,
2010-07-23 18:17:4611 open-collector and 3-state buses. The devices transmit data from the A bus (open-collector) to the B bus (3 state) or from the B bus to the A bus,
2010-07-23 18:14:1710 These octal bus transceivers are designed for asynchronous two-way communication between data
2010-07-23 18:11:2011 These octal bus transceivers are designed for asynchronous two-way communication between data
2010-07-23 18:09:528 buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the level at the direction-control
2010-07-23 17:42:0916 buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-
2010-07-23 17:39:415 buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the directio
2010-07-23 17:20:169 The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DI
2010-07-23 17:13:275 The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DI
2010-07-23 16:46:3428 buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the directio
2010-07-23 16:44:5513 The devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the direction-control (DIR)
2010-07-23 16:18:549 function implementation allows for maximum flexibility in timing.
The device allows data transmission from the A bus to the B bus
2010-07-22 17:23:4212 The control-function implementation minimizes external timing requirements.
The device allows data transmission from the A bus to t
2010-07-22 17:21:5214
The SN74LVCH16652A consists of D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly fro
2010-07-22 16:45:153
The SN74LVC2952A consists of two 8-bit back-to-back registers that store data flowing in both directions between two bidirectional
2010-07-22 16:31:4311 arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Enable GAB and GBA are provide
2010-07-22 16:28:112
The SN74ALVCH16646 can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is clocked into the re
2010-07-21 22:05:2711 arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA)
2010-07-21 21:53:355 arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA)
2010-07-21 21:49:496 flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage reg
2010-07-21 21:44:143 arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into
2010-07-21 21:18:195 for multiplexed transmission of data directly from the data bus or from the internal storage registers. Enable GAB and GBA are provided
2010-07-20 15:58:524 What Is Portable Digital Storage?
Portable digital storage is a storage solution which is designed
2010-03-25 11:16:34797 What Is a Portable Hard Drive?
A portable hard drive is a type of digital storage device.
2010-03-25 11:16:031234 What is UATA?
In computers, Ultra Advanced Technology Attachment (UATA) is a term used to describe
2010-03-25 11:15:36832 What is an SCSI Hard Drive?
A SCSI hard drive is a storage drive which uses a different system
2010-03-25 11:15:031470 for SATA technologies. It competes with FireWire 400 and universal serial bus (USB) 2.0 to provide fast data transfer speeds
2010-03-25 11:12:561179 , the characteristicimpedance of a PCB trace, along comes a data sheetthat tells you to design for a specific differential impedance.And
2010-01-15 10:21:4719 Impedance Terminations -What’s the Value:There is a lot of confusion in the industry about
2010-01-15 09:16:2911
Problem What range of dielectric constants you could be realize with your PCB materials? 
2009-12-29 09:26:53639
Problem What is the maximum temperature your PCB can handle?
Solution 130 Degrees C.266 Degrees F.
Details:
2009-12-29 09:25:02397 What is the minimum space between a pair of tracks on a PCB that could be manufactured?
Problem
2009-12-29 09:24:25742 What is Soldermask? 什么是綠油
The normally green coating used to protect the board and circuitry
2009-12-29 09:20:041792 What It Me
2009-11-26 10:16:2836 The SCAN921023 transforms a 10-bit wide parallelLVCMOS/LVTTL data bus into a single high speed
2009-10-13 09:58:1631 The SCAN921023 transforms a 10-bit wide parallelLVCMOS/LVTTL data bus into a single high speed
2009-10-13 09:53:031 What is NI Ultiboard?什么是Ultiboard?
National Instruments Electronics Workbench GroupThe National Instruments Electronics Workbench Group (for
2009-07-01 07:47:473222 What It Me
2009-06-29 16:13:096 iCoupler® Isolation in CAN Bus Applications:The Controller Area Network (CAN) bus, a robust
2009-06-21 10:28:2117 What is an LFSR,什么是LFSR
Texas Instruments (TI) reserves the right to make changes to its products
2009-06-14 09:10:5331 什么是LFSR,What is an LFSR?
The purpose of this article is to explain what a Linear Feedback Shift
2009-05-14 11:42:372311 Abstract: The following article describes how to slow down and store high-speed data of a typical
2009-05-08 11:00:09794 in a classic FAQ format it addresses topics such as: What is an ADC, what is a DAC, what is nyquist, effects of charge injection, techniques f
2009-05-08 09:18:135466 Universal Serial Bus Device Class Definition for Audio Data Formats
The intention of this document
2009-04-11 19:34:1826 Universal Serial Bus Device Class Definition for Printing Devices
The Universal Serial Bus (USB
2009-04-11 19:32:1415 PCI Local Bus Specification V2.3
The PCI Local Bus is a high performance 32-bit or 64-bit bus
2008-12-09 14:03:01182 transmissionfrom the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control(DIR) input
2008-10-14 09:39:2235 RS485 Application Using A Combination of NXP And ADI Products
RS485 Bus is a serial communication
2008-04-09 16:00:141559
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