The MAX9248/MAX9250 digital video serial-to-parallel
converters deserialize a total of 27 bits during data and
control phases. In the data phase, the LVDS serial input is
converted to 18 bits of parallel video data and in the con-
trol phase, the input is converted to 9 bits of parallel con-
trol data. The separate video and control phases take
advantage of video timing to reduce the serial-data rate.
The MAX9248/MAX9250 pair with the MAX9247 serializer
to form a complete digital video transmission system. For
operating frequencies less than 35MHz, the MAX9248/
MAX9250 can also pair with the MAX9217 serializer.
The MAX9248 features spread-spectrum capability,
allowing output data and clock to spread over a speci-
fied frequency range to reduce EMI. The data and
clock outputs are programmable for a spectrum spread
of ±4% or ±2%. The MAX9250 features output enable
input control to allow data busing.
Proprietary data decoding reduces EMI and provides
DC balance. The DC balance allows AC-coupling, pro-
viding isolation between the transmitting and receiving
ends of the interface. The MAX9248/MAX9250 feature a
selectable rising or falling output latch edge.
ESD tolerance is specified for ISO 10605 with ±10kV
Contact Discharge and ±30kV Air-Gap Discharge.
The MAX9248/MAX9250 operate from a +3.3V ±10%
core supply and feature a separate output supply for
interfacing to 1.8V to 3.3V logic-level inputs. These
devices are available in a 48-lead LQFP package and
are specified from -40°C to +85°C or -40°C to +105°C.