The TMS320VC5471 integrates a DSP subsystem based on the TMS320C54x architecture and a RISC microcontroller subsystem based on the ARM7TDMI core as shown in Figure 2-1. The DSP subsystem includes 72K x 16-bit SRAM, a timer, a DMA controller, an external memory interface, and two McBSPs. The MCU subsystem includes three timers, general-purpose I/O, an external memory interface, and an Ethernet (10/100Base-T) interface with a media-independent interface (MII) port.

The TMS320VC5471 is implemented as two major subsystems that are highly independent. The DSP subsystem includes the following modules:

• TMS320C54x? DSP core
• 72K x 16-bit internal SRAM organized as 32K x 16-bit of data SRAM and 40K x 16-bit of program SRAM.
• ARM port interface (API) to provide access by the MCU to 8K x 16 of the DSP’s data SRAM
• Two multichannel buffered serial ports (McBSPs)
• Phase-locked loop (PLL)
• Timer
• Direct memory access (DMA) controller
• Programmable wait-state generator
• External memory interface