The AD5334/AD5335/AD5336/AD5344 are quad 8-， 10-， and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 500 μA at 3 V， and feature a power-down mode that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can drive the output to both supply rails. The AD5334/AD5335/AD5336/AD5344 have a parallel interface. CS selects the device and data is loaded into the input registers on the rising edge of WR. The GAIN pin on the AD5334 and AD5336 allows the output range to be set at 0 V to VREF or 0 V to 2 × VREF. Input data to the DACs is double-buffered， allowing simultaneous update of multiple DACs in a system using the LDAC pin. On the AD5334， AD5335 and AD5336 an asynchronous CLR input is also provided. This resets the contents of the Input Register and the DAC Register to all zeros. These devices also incorporate a power-on-reset circuit that ensures that the DAC output powers on to 0 V and remains there until valid data is written to the device. The AD5334/AD5335/AD5336/AD5344 are available in Thin Shrink Small Outline Packages （TSSOP）.